Ambient Light Sensor

ABSTRACT

Embodiments described herein relate to a light sensing system. In one embodiment, the light sensing system may include a microprocessor including an input pin configured to receive a first voltage from a light sensor. The light sensing system may also include a pull-up resistor coupled to the input pin. The pull-up resistor may include a first gate. The light sensing system may further include a pull-down resistor coupled to the input pin. The pull-down resistor may include a second gate. The first and second gates may allow for connecting or disconnecting the pull-up and pull-down resistors based on the amount or intensity of light detected by the light sensor.

BACKGROUND

I. Technical Field

Embodiments disclosed herein relate generally to sensor devices, and,more particularly, to an ambient light sensor.

II. Background Discussion

Many electronic devices such as desktop computers, notebook computers,personal digital assistants, cell phones, and so on, include integratedlight sensors configured to sense ambient light. Typically, such lightsensors convert the received light into either current or voltage thatmay be processed by the electronic device to determine the amount oflight surrounding the device. The electronic device may then control theoperation of one or more components based on the sensed amount of light.As an example, laptops often include a controller that dims or brightensthe laptop display screen according to a detected brightness, asmeasured by a light sensor.

Existing ambient light sensor devices may be complicated analog ordigital circuits that require significant hardware for theirimplementation. For example, an analog light sensor circuit may includea silicon detector that is amplified by a circuit and converted by ananalog-to-digital converter to a digital value. Digital light sensorcircuits typically include a voltage-to-frequency (V/F) converter, acounter, and additional digital logic for converting the output of thelight sensor for processing by the electronic device. These sensors areoften complex and may be expensive to manufacture, as well as requiresignificant power for their operation.

What is needed is a way to sense light, by an electronic device thatutilizes cost-efficient hardware and software, while conserving power.

SUMMARY

Generally, embodiments described herein may relate to light sensors andlight sensing systems that may be, but are not necessarily, employed inan electronic device. The embodiments may include a pull-up resistor anda pull-down resistor coupled to a digital input-output (I/O) pin of amicroprocessor. In one embodiment, the pull-up and pull-down resistorsmay be configured to receive a voltage from a light sensor and eitherpull up or pull down the voltage to obtain a logic value. Additionally,some embodiments include control logic configured to connect ordisconnect the pull-up and pull-down resistors based on a logic value.

One embodiment may take the form of a light sensing system. The lightsensing system may include a microprocessor including an input pinconfigured to receive a first voltage from a light sensor. The lightsensing system may also include a pull-up resistor coupled to the inputpin. The pull-up resistor may include a first gate. The light sensingsystem may further include a pull-down resistor coupled to the inputpin. The pull-down resistor may include a second gate.

Another embodiment may take the form a method for detecting levels oflight. The method may include receiving a first voltage from a lightsensor, connecting a pull-down resistor to obtain a first logic value,sampling a digital signal at an I/O pin, and determining a first lightlevel based on the first logic value. Yet another embodiment may takethe form of an electronic device including a light sensor configured tosense light and convert the sensed light to a first voltage and amicroprocessor coupled to the light sensor. The microprocessor mayinclude a digital I/O pin and may be configured to receive the firstvoltage from the light sensor. The electronic device may further includea pull-up resistor coupled to the digital I/O pin, as well as apull-down resistor coupled to the digital I/O pin. The microprocessormay be operative to selectively connect the pull-up resistor to thedigital I/O pin at least partially in response to the first voltage. Themicroprocessor may be further operative to selectively connect thepull-down resistor to the digital I/O pin at least partially in responseto the first voltage.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates an embodiment of a laptop computer that includes oneembodiment of a light sensing system.

FIG. 2 is a schematic diagram of the embodiment of the light sensingsystem of FIG. 1.

FIG. 3 is a flowchart illustrating one embodiment of a method fordetecting levels of light.

FIG. 4 is a flowchart illustrating another embodiment of a method fordetecting levels of light.

FIG. 5 is a state diagram corresponding to the method of FIG. 4.

FIG. 6 is a schematic diagram of another embodiment of the light sensingsystem.

DETAILED DESCRIPTION

Generally, embodiments described herein may relate to light sensors andlight sensing systems that may be, but are not necessarily, employed inan electronic device. The embodiments may include a pull-up resistor anda pull-down resistor coupled to a digital input-output (I/O) pin of amicroprocessor. In one embodiment, the pull-up and pull-down resistorsmay be configured to receive a voltage from a light sensor and eitherpull up or pull down the voltage to obtain a logic value. Additionally,some embodiments include control logic configured to connect ordisconnect the pull-up and pull-down resistors from the microprocessorbased on a determined logical value. In one embodiment, the light sensormay be configured to distinguish between three different levels oflight.

FIG. 1 is a perspective view of a laptop 100 including an ambient lightsensor 102. As shown, the laptop 100 may include a base portion 104 anda cover portion 106 that may be folded over the base portion 104 forportability and/or storage. The base portion may include a housing forencasing the electronic components of the laptop 100. The electroniccomponents may include, but are not limited to, a motherboard, centralprocessing unit (CPU), memory, battery, controllers, and so on. Thecover portion 106 may include a display device 108 and a housingconfigured to support the display device. In one embodiment, the housingmay include a display bezel 110 configured to frame the display device108.

The laptop 100 may further include a light sensor 105 including a lightsensitive portion for sensing light impinging on the light sensor 105.In one embodiment, the light sensor 105 may be an ambient light sensorconfigured to sense light within the visible light spectrum. However,other embodiments may utilize other types of sensors. For example, oneembodiment may include a thermal or heat sensor, an acoustic, sound, orvibration sensor, a chemical sensor, and so on and so forth.Additionally, some embodiments may utilize sensors configured to detectwaves outside of the visible light spectrum. For example, the sensor maybe configured to detect sound waves and/or other frequencies ofelectromagnetic radiation, including microwave waves, x-rays,ultraviolet radiation, infrared radiation, gamma rays, and so on.

In one embodiment, the light sensor may be mounted behind the displaybezel 110 of the laptop 100. In other embodiments, the ambient lightsensor may be mounted to other portions of the laptop, including, butnot limited to, inside the base portion, on the exterior of the laptop,and so on. Additionally, in some embodiments, the sensor 105 may bestrategically positioned in a location that enhances the accuracy of thelight sensor reading and/or increases or decreases the amount of lightsupplied to the light sensor. The light sensor may be any type of lightsensor, including, but not limited to, a photoresistor, opticaldetector, chemical detector, photovoltaic cell, photodiode,phototransistor, charge-coupled device, and so on.

In one embodiment, light may be supplied to the light sensitive portionof the light sensor 105 through a mechanical configuration of thelaptop. For example, in some embodiments, the light sensitive portionmay be fully or partially exposed or packaged within a translucent orsemi-translucent window. Other embodiments may utilize differentconfigurations for providing the light sensor with light. For example,in one embodiment, light may be supplied through an optical fiberconnection. In yet another embodiment, a light sensor may be placedbelow a speaker grille and receive light through the grille.

As will further be described below, the light sensor may becommunicatively connected to a controller that is configured tointerface with an electronic component. The term “connected” or“coupled,” as used herein, is intended to cover both direct and indirectconnections/couplings. The controller may be any suitable control deviceincluding, but not limited to, a graphics controller, a memorycontroller, a network controller, a disk controller, a pulse widthmodulator, and so on. In some embodiments, the controller may becommunicatively connected to multiple electronic components and/or thelight sensor may be communicatively connected to multiple controllers.

Sample electronic components may be part of the laptop or may be aperipheral device. For example, an electronic component may be thedisplay device on the laptop, a power supply, a light source providedwithin the laptop, the laptop microprocessor, a power source, anexternal input or output device connected to the laptop, and so on andso forth.

In one embodiment, the controller may be configured to interface withthe electronic component based on an output of the light sensor. As anexample, the controller may be configured to change the luminous outputof a light source based on a reading of the light sensor. As anotherexample, the controller may be configured to change the amount of powerthat the electronic component draws from a power source based on thelight level reading of the light sensor. As a further example, thecontroller may be configured to change the light output of the laptopdisplay device based on the light level reading of the light sensor.Other embodiments may include controllers that interface with aconnected control component in other ways, as will be further describedbelow.

Although the light sensor 105 is illustrated in FIG. 1 in conjunctionwith a laptop 100, those of ordinary skill in the art will recognizethat the light sensor 105 may be implemented in a variety of electronicdevices including, but not limited to, portable computing devices, cellphones, televisions, personal computers, smart phones, personal digitalassistants, media players, appliances such as refrigerators, microwaveovens, and any other suitable electronic device. As such, although thedescription included herein may include some specific embodiments, itshould be understood that the light sensor may be implemented in a widevariety of devices and may perform a variety of functions beyond theembodiments specifically described herein.

FIG. 2 illustrates a simplified schematic diagram of one embodiment ofan ambient light sensing system 200 that may be used in conjunction withthe laptop of FIG. 1 or another electronic device. As shown, the lightsensing system 200 may include a light sensor 201 connected to amicroprocessor 203. In one embodiment, the microprocessor may include adigital I/O pin 250, a pull-up resistor 208, and a pull-down resistor210. The input of the I/O pin 250 may be connected to the output of thelight sensor 201 and the output of the I/O pin may be connected to acontroller 204. The light sensing system 200 may further include acontrolled component 206 connected to the controller 204. In someembodiments, the controller may be omitted and the microprocessor maydirectly control the component 206.

In one embodiment, the light sensor 201 may include a photodiode 202. Asdiscussed above, the photodiode may include a light sensitive portionconfigured to sense or detect light impinging on the light sensor. Inother embodiments, the light sensor 201 may include another type ofsemiconductor diode, or other electrical device, configured to convertlight to a measurable current or voltage. For example, in certainembodiments the light sensing system 200 may utilize some other types oflight sensors, such as a phototransistor, photoresistor, photovoltaiccell, and so on. Some embodiments utilizing a light sensor 201configured to convert light to current may further include acurrent-to-voltage converter (or transimpedance amplifier) forconverting the current received from the light sensor to a correspondingvoltage. Additionally and as discussed above, other embodiments mayutilize other types of sensors in order to measure other variables, suchas a thermal resistor having a resistance that varies with a sensedtemperature.

The photodiode 202 may be coupled to a voltage source. For example, thevoltage source may be a power supply, battery, and so on and so forth.The photodiode 202 may be configured to convert light to a measurablecurrent or voltage, with the amount and/or intensity of light impingingon the photodiode determining the amount of current or level of voltageoutput by the photodiode. In one embodiment, the photodiode may have aPN structure. However, in other embodiments, the photodiode may have aPIN structure. Other embodiments may have other diode configurations.The photodiode 202 may be connected to the I/O pin 250 of themicroprocessor 203. In some embodiments, the photodiode may also becontrolled by control logic configured to activate and deactivate apull-up resistor 208 and a pull-down resistor 210. The control logic maybe provided by the microprocessor 203. In other embodiments, the pull-upresistor 208 and pull-down resistor 210 may be activated and deactivatedvia a floating gate analog circuit or application-specific integrateddigital circuit. However, in other embodiments, the control logic may beprovided by a source outside the microprocessor 203. In one embodiment,the control logic may be software. In further embodiments, the controllogic may be a circuit configured to execute the logic functionsdiscussed herein, an additional microprocessor, firmware, or any othersoftware or hardware configured to perform the logic functions discussedherein.

In some embodiments, the photodiode 202 and the I/O pin 250 may furtherbe connected to an optional resistor 205 for correcting dark currentleakage of the photodiode 202. As is shown, the resistor 205 may beconnected to ground. In one embodiment, the resistor 205 may have aresistance that compensates for any dark current leakage of thephotodiode 202. However, in other embodiments, the resistor 205 may betemperature compensated, such as a thermistor having a resistance thatvaries with temperature, to more closely track the dark current of thephotodiode 202 as it varies with temperature. This may serve to improveover-temperature performance of the light sensing system 200, forexample, when the dark current leaked from the photodiode 202 issignificant as compared to current in the pull-down resistor 210. Theresistance of the resistor 205 may be higher or lower according todifferent embodiments, or may be omitted from the light sensing system200 altogether.

Generally, the photodiode 202 may convert light impacting the photodiodeto voltage or current having a first voltage level V_(out). In oneembodiment, the photodiode 202 may be configured to transmit the firstvoltage V_(out) to the control logic, which may be configured to connectand disconnect the pull-up and pull-down resistors 208, 210 of themicroprocessor 203. As shown, the pull-up resistor 208 may include alogic gate 252 for connecting or disconnecting the resistor 208 to thevoltage source. When the logic gate 252 is closed and the logic gate 254is open, the pull-up resistor 208 may pull the first voltage V_(out)towards a high voltage level, which may be the voltage source level, V⁺.Similarly, the pull-down resistor 210 may include a logic gate 254 forconnecting or disconnecting the resistor 210 to ground. When the gate254 is closed and the gate 252 is open, the pull-down resistor 210 maypull the first voltage V_(out) toward a low voltage level, or ground. Aswill be further discussed below, the high and low voltage levels maycorrespond to logic values representing different levels of light, asdetected by the photodiode. For example, in one embodiment, the highvoltage level may correspond to a logical output of “1” and the lowvoltage level may correspond to a logical output of “0.” In certainembodiments, the logic gates and/or pull-up and pull-down resistors maybe external to the microprocessor 203.

In one embodiment, the logic gates 252, 254 each take the form of, orinclude, a switch that may be opened or closed based on the controllogic. In other embodiments, the logic gate functions may be performedby one or more transistors. For example, each logic gate 252, 254 mayinclude a p-type or n-type metal oxide semiconductor field effecttransistor (MOSFET) configured to act as a logic gate. In anotherembodiment, the logic gate 252, 254 may take the form of a circuit, suchas a CMOS or an NMOS circuit.

The logic values supplied by the pull-up and pull-down resistors 208,210 may be transmitted to the input of the microprocessor I/O pin 250.In one embodiment, the I/O pin 250 may be connected at a junctionbetween the pull-up and pull-down resistors 208, 210. However, in otherembodiments, the I/O pin 250 may be otherwise connected to the resistors208, 210. For example, the I/O pin 250 may include two inputs that areeach connected to a pull-up or pull-down resistor 208, 210.

The output of the I/O pin 250 may be connected to a controller 204. Asmentioned above, the controller 204 may be configured to process thelogic value received from the I/O pin 250 to derive a control signal forcontrolling at least one function of a controlled component. The controlsignals may be transmitted to the controlled component 206 via anysuitable communication medium. For example, the control signals may betransmitted through a wired connection or wirelessly, over a network,computer channel, as part of an integrated circuit or internally to themicroprocessor 203, and so on.

In one embodiment, the pull-up and pull-down resistors 208, 210 may beconfigured to pull up and pull down, respectively, the first voltageV_(out) based on a threshold voltage level. For example, in oneembodiment, the pull-up resistor 208 may be configured to pull up thefirst voltage V_(out) if the voltage is greater or equal to thethreshold voltage level. The threshold voltage may be any desired orprogrammed voltage level. In one particular embodiment, the thresholdvoltage may be equal to half of the source voltage.

The pull-down resistor 210 may operate similar to the pull-up resistor208. In one embodiment, the pull-down resistor 210 may be configured topull down the first voltage V_(out) if the voltage is less than or equalto the threshold voltage level. In another embodiment, the pull-downresistor 210 may be configured to pull down the first voltage V_(out) ifthe first voltage is less than the threshold voltage level. Otherembodiments may include other ways of determining whether to pull up orpull down the first voltage V_(out).

In some embodiments, the threshold voltage levels of the pull-upresistor 208 may be different than the threshold voltage level of thepull-down resistor 210. For example, in one embodiment, the thresholdvoltage level of the pull-down resistor 210 may be larger than thethreshold voltage of the pull-up resistor 208. However, in otherembodiments, the threshold voltage levels of the pull-up and pull-downresistors 208, 210 may be substantially equal.

The use of pull-up and pull-down resistors 208, 210 may enhance theperformance of the light sensor 201, while allowing the microprocessor203 to draw less power during operation. In some embodiments, the logicgates 252, 254 may continually draw current when the first voltageV_(out) level is between the source voltage and ground due to thecreation of an electrical potential difference across the resistors 208,210. For example, if the first voltage V_(out) level is between thethreshold voltage level and ground and the pull-up resistor 208 isconnected, the logic gate 252 corresponding to the pull-up resistor 208may draw current due to the potential difference across the pull-upresistor. In one embodiment, this potential difference may besubstantially equal to the difference in voltage between the firstvoltage V_(out) level and the source voltage level. As another example,if the first voltage V_(out) level is between the threshold voltagelevel and the source voltage level and the pull-down resistor 210 isconnected, the logic gate 254 corresponding to the pull-down resistor208 may draw current due to the potential difference across thepull-down resistor. In one embodiment, this potential difference may besubstantially equal to the difference in voltage between the firstvoltage V_(out) level and ground.

However, when the first voltage V_(out) is pulled up or down, the logicgates 252, 254 may be prevented from drawing excessive current andwasting power supplied by the electronic device, since the potentialdifference across the resistors is minimized. For example, in oneembodiment, if the first voltage V_(out) level is between the thresholdvoltage level and ground, connecting the pull-down resistor 210 may pullthe first voltage V_(out) down to ground so that there is no potentialdifference across the pull-down resistor 210. Similarly, in anotherembodiment, if first voltage V_(out) level is between the thresholdvoltage level and the source voltage, connecting the pull-up resistor208 may pull the first voltage V_(out) level up to the source voltage sothat there is no potential difference across the pull-up resistor 208.Additionally, pulling the first voltage V_(out) up or down reduces therisk of accidentally activating the gates 252, 254, which may occur ifthe first voltage V_(out) is left near the threshold voltage level.Accordingly, the pull-up and pull-down resistors 208, 210 may provideadditional power savings by preventing such accidental activation.

The use of pull-up and pull-down resistors 208, 210 further eliminatessome of the complicated circuitry associated with existing lightsensors, thereby allowing for better utilization of space on themicroprocessor chip. Accordingly, some embodiments may employ a largerlight sensitive area to increase the accuracy or sensitivity of thelight readings.

FIG. 3 is a flowchart illustrating an embodiment of a method 300 fordetecting levels of light using a light sensor. In one embodiment, thelight sensor may be a photodiode 202 as shown in the embodiment of FIG.2, although other embodiments may utilize other types of sensors. Themethod presumes that both the pull-up and pull-down resistors areinitially not connected. That is, the method presumes that gates 252 and254 are both open.

The method 300 includes connecting a pull-down resistor 210 to thedigital I/O pin 250 of a microprocessor 203, as indicated at block 301.As discussed above, this may be performed by control logic configuredconnect the pull-down resistor 210 to the digital I/O pin 252 of themicroprocessor 203. In the operation of block 303, the control logic maythen sample the digital signal at the I/O pin 252 to determine its logicvalue. As discussed above, the logic value may correspond to the lightlevel or intensity detected by the photodiode 202.

In one embodiment, the logic value may be obtained by comparing thevoltage V_(out) output by the photodiode 202 to a threshold voltagelevel. If the voltage V_(out) is greater than or, alternatively, greaterthan or equal to the threshold voltage level, then the pull-downresistor may not be connected (e.g., the corresponding gate 254 may beopened). In this example, the sampled digital signal at the I/O pin maybe the voltage V_(out), resulting in a logical output of 1. In contrast,if the voltage V_(out) output by the photodiode 202 is less than, oralternatively, less than or equal to, the threshold voltage level,connecting the pull-down resistor may pull the voltage V_(out) toground, e.g., to generate a logical output of “0.”

If, in the operation of block 305, the sampled logic value is a logicaloutput of 1, then, in the operation of block 307, the control logic maypresume that the photodiode 202 is receiving a large amount of light or,alternatively, that the received light has a high intensity. In theoperation of block 309, the pull-up resistor 208 may then be connectedto pull the voltage V_(out) to the high voltage level and prevent thelogic gates 252, 254 from drawing current. The method 300 may thenproceed to the operation of block 323, in which the control logic mayreset the pull-up and pull-down resistors 208, 210 in preparation for asubsequent reading, in which the operations of the method are repeated.In one embodiment, this may involve disconnecting the pull-up andpull-down resistors.

If, in the operation of block 305, the logic value is a logical outputof 0, then, in the operation of block 311, the control logic may beconfigured to connect the pull-up resistor 208 to the voltage source V+.Upon connecting the pull-up resistor 208, the pull-down resistor 210 maysimultaneously be disconnected from the I/O pin.

In the operation of block 313, the control logic may be configured tosample the logic value at the I/O pin 250 a second time. As discussedabove, the logic value may be obtained by comparing the voltage V_(out)output by the photodiode 202 to a threshold voltage level. If thevoltage V_(out) is greater than, or alternatively, greater than or equalto, the threshold voltage level, then connecting the pull-up resistormay generate a logical output of 1. In contrast, if the voltage V_(out)is less than, or alternatively, less than or equal to the thresholdvoltage level, then connecting the pull-up resistor may generate alogical output of 0.

If, in the operation of block 315, the sensed logic value at the I/O pin250 is a logical output of 1, then in the operation of block 317, thecontrol logic may determine that the photodiode is receiving a mediumamount of light, or alternatively, that the received light has a mediumintensity. In the operation of block 319, the pull-down resistor may beconnected so as to pull the voltage V_(out) to the low voltage level andprevent the logic gates 252, 254 from drawing current.

If, in the operation of block 315, the sensed the logic value is alogical output of 0, then, in operation 321, the control logic maydetermine that the photodiode is receiving a low amount of light or nolight. Accordingly, the pull-down resistor 210 may be connected so as topull the voltage V_(out) to the low voltage level. The method 300 maythen proceed to the operation of block 323, in which the control logicmay reset the pull-up and pull-down resistors and repeat the operationsof the method 300.

Table 1, shown below, summarizes the logic values and associated lightlevels according to the embodiment just described:

TABLE 1 State of pull- State of pull- Logical Logical down resistor upresistor output at output at Light Level at block 301 at block 311 block303 block 313 HIGH Do not pull N/A 1 N/A down to low voltage levelMEDIUM Pull down to Pull up to 0 1 low voltage high voltage level levelLOW Pull down to Do not pull 0 0 low voltage up to high level voltagelevel

FIG. 4 is a flowchart illustrating another embodiment of a method 400for detecting levels of light using a light sensor. Similar to theembodiment shown in FIG. 3, the light sensor may be a photodiode 202 asshown in the embodiment of FIG. 2, although other embodiments mayutilize other types of sensors.

The method 400 of FIG. 4 may permit distinguishing multiple intermediatelevels of light that occur between the high and low levels. Theseintermediate levels are depicted in FIG. 4 as “higher” and “lower”medium levels. The “higher” medium level may represent a higherintensity or, alternatively, a larger amount of received light than the“lower” medium level.

The method may begin in the operation of block 401. In the operation ofblock 403, both the pull-up and pull-down resistors 208, 210 may bereset. In one embodiment, this may be accomplished by disconnecting thepull-up and pull-down resistors 208, 210. That is, the logic gates 252and 254 may both be open.

In the operation of block 407, the microprocessor may sample the digitalsignal at the I/O pin 250. If, in the operation of block 407, thesampled logic value at the I/O pin 250 is a logical output of 1, thenthe control logic may presume that the photodiode 202 is receiving atleast a larger medium amount of light (or that the received light has ahigher medium intensity). In one embodiment, the control logic maypresume that the photodiode is receiving either a large amount of light(or alternatively, that the received light has a high intensity) or alarger medium amount of light. In the operation of block 419, thepull-down resistor 210 may be connected. That is, the correspondinglogic gate may be closed. In the operation of block 420, themicroprocessor may take another sample of the digital signal at the I/Opin 250.

If, in the operation of block 405, the sampled logic value at the I/Opin 250 is a logical output of 1, then, in the operation of block 425,the control logic may presume that the photodiode 202 is receiving alarge amount of light. In the operation of block 427, the pull-upresistor may then be connected to pull the voltage V_(out) to the highvoltage level and prevent the logic gates 252, 254 from drawing current.The method 400 may then proceed to the operation of block 431, in whichthe control logic may wait until the next subsequent reading. Theoperation of block 431 is optional. Accordingly, in some embodiments,the control logic may wait a predetermined period of time beforeobtaining another reading. However, in other embodiments, the controllogic may obtain the next reading without any intervening delay period.The method 400 may then proceed to the operation of block 433, in whichthe operations of the method are repeated.

If, in the operation of block 423, the sampled logic value at the I/Opin 250 is a logical output of 0, then, in the operation of block 421the control logic may presume that the photodiode 202 is receiving ahigher medium level of light that may have a lower intensity or,alternatively, a smaller amount of light than the high level of lightdetected in block 425. In the operation of block 427, the pull-upresistor may then be connected to pull the voltage V_(out) to the highvoltage level to prevent the logic gates 252, 254 from drawing currentdue to a potential difference over the pull-down resistor 210. Themethod 400 may then proceed to the operation of block 431, in which thecontrol logic may wait until the next subsequent reading subsequentreading. The operation of block 431 is optional. Accordingly, in otherembodiments, the control logic may obtain the next light reading withoutany intervening delay period. The method 400 may then proceed to theoperation of block 433, in which the operations of the method arerepeated.

If, in the operation of block 407, the sampled logic value at the I/Opin 250 is a logical output of 0, then the control logic may presumethat the photodiode 202 is receiving less than a lower medium amount oflight (or that the received light has less than a lower mediumintensity). In one embodiment, the control logic may presume that thephotodiode is receiving either a low amount of light (or, alternatively,that the received light has a low intensity) or a lower medium amount oflight.

In the operation of block 409, the pull-up resistor 208 may beconnected. In the operation of block 410, the microprocessor may takeanother sample of the digital signal at the I/O pin 250. If, in theoperation of block 410, the sampled logic value is a logical output of1, then, in the operation of block 415, the control logic may presumethat the photodiode 202 is receiving a lower medium amount of light. Inthe operation of block 417, the pull-down resistor 210 may then beconnected to pull the voltage V_(out) to the low voltage level andprevent the logic gates 252, 254 from drawing current due to a potentialdifference over the pull-up resistor 208. The method 400 may thenproceed to the operation of block 431, in which the control logic maywait until the next subsequent reading. As discussed above, theoperation of block 431 is optional. Accordingly, in some embodiments,the control logic may obtain the next reading without any interveningdelay period. The method 400 may then proceed to the operation of block433, in which the operations of the method are repeated.

If, in the operation of block 413, the sampled logic value at the I/Opin 250 is a logical output of 0, then, in the operation of block 411,the control logic may presume that the photodiode 202 is receiving a lowlevel of light that may be of lower intensity or, alternatively, a loweramount of light than the lower medium level of light detected in block415. In the operation of block 417, the pull-down resistor may then beconnected to pull the voltage V_(out) to the low voltage level andprevent the logic gates 252, 254 from drawing current. The method 400may then optionally proceed to the operation of block 431, as discussedabove. The method 400 may then proceed to the operation of block 433, inwhich the operations of the method are repeated.

Table 2, shown below, summarizes the logic values and associated lightlevels according to the embodiment just described.

TABLE 2 State of pull- State of pull- Logical output as down resistor upresistor determined at blocks Light Level at block 419 at block 409413/423 HIGH Do not pull N/A 1 down to low voltage level HIGHER Pulldown to N/A 0 MEDIUM low voltage level LOWER N/A Pull up to 1 MEDIUMhigh voltage level LOW N/A Do not pull 0 up to high voltage level

In one embodiment, the I/O pin may be sampled at uniform time intervals.However, in other embodiments, the I/O pin may be sampled at varyingtime intervals. The duration of the time intervals may vary according todifferent embodiments, and may depend on the desired response time foradjusting the controlled component. In other embodiments, a pulse widthmodulator may be connected to the output of the I/O pin and the lightlevel be determined by measuring the duty cycle a pulse waveform.Another embodiment may utilize a voltage-to-frequency (V/F) converterconnected to a counter. The light level may be determined by countingthe pulses of the I/O pin output.

FIG. 5 illustrates a state diagram 500 corresponding to the method 400of claim 4. As shown in FIG. 5, the method 400 may facilitatedistinguishing between high, higher medium, lower medium, and low lightlevels based on a logic threshold 501. In one embodiment, the threshold501 for the pull-down resistors 210 may be set to a suitably low levelsuch that the high levels of light 503 may not be pulled below the logicthreshold using a pull-down resistor. Accordingly, the logic value atthe I/O pin 250 may remain unchanged after the pull-down resistor isapplied. Similarly, the threshold for the pull-up resistors 208 may beset to a suitably high level such that the low levels of light 509 maynot be pulled above the logic threshold level 501 using a pull-upresistor. Accordingly, the logic value at the I/O pin 250 may remainunchanged after the pull-up resistor is applied.

In contrast, the electrical levels encompassed by the higher medium 505and lower medium 507 levels of light may overlap the logic threshold501. Accordingly, when the pull-up and pull-down resistors 208, 210 areconnected, the logic value at the I/O pin 250 may change. As discussedabove with respect to the method 400 illustrated in FIG. 4, the logicvalue may be sampled before and after the pull-up and pull-downresistors 208, 210 are connected to detect this change, and todistinguish the higher medium light level from the high light level andthe lower medium light level from the low light level.

Table 3 illustrates another possible state diagram of the method 400 inwhich the sampled logic value in the operation of block 405 may be usedfor determining whether the pull-up or pull-down resistor should beconnected in operations 409 or 419, as well as for determining whetherthe received light is at or above a higher medium or at or below lowermedium light level:

TABLE 3 Logical Logical output as output as State of pull- State ofpull- determined determined down resistor up resistor at block at blocksLight Level at block 419 at block 409 407 413/423 HIGH Do not pull N/A 11 down to low voltage level HIGHER Pull down to N/A 1 0 MEDIUM lowvoltage level LOWER N/A Pull up to 0 1 MEDIUM high voltage level LOW N/ADo not pull 0 0 up to high voltage level

Another embodiment of a light sensing system 600 is illustrated in FIG.6. As shown, some embodiments may include multiple inputs 601 andpull-up/pull-down resistor circuits 602(1)-602(n) to measure additionallevels of light. In one embodiment, the number of different detectablelight levels may be directly proportional to the number ofpull-up/pull-down resistor circuits 602(1)-602(n) within amicroprocessor 603. For example, the illustrated embodiment, whichincludes n pull-up/pull-down resistor circuits 602(1)-602(n), may allowfor the detection of 3*n different light levels. The different lightlevels may all be associated with the same electronic device, or may beassociated with different devices.

Other embodiments may include other circuit configurations. For example,one embodiment may include multiple pull-up/pull-down resistor circuits602(1)-602(n) connected to a single input. Other embodiments may includemultiple control logic blocks, more or fewer pull-up and/or pull-downresistors, and so on. Additionally, some embodiments may includemicroprocessors having multiple output pins for interfacing withmultiple controllers. Accordingly, in some embodiments, a singlemicroprocessor may produce light readings that may be processed bymultiple controllers.

Although various specific embodiments have been described above, itshould be appreciated that a single device may implement variousdifferent aspects of the specific embodiments described above. Further,one or more aspect may be implemented in an embodiment without includingother aspects.

1. A light sensing system, comprising: a microprocessor including aninput pin, the input pin configured to receive a first voltage from alight sensor; a pull-up resistor coupled to the input pin, the pull-upresistor including a first gate; and a pull-down resistor coupled to theinput pin, the pull-down resistor including a second gate.
 2. The lightsensing system of claim 1, wherein the light sensor is a photodiode. 3.The light sensing system of claim 1, wherein the light sensor isconfigured to sense light and convert the sensed light to the firstvoltage.
 4. The light sensing system of claim 1, wherein the first gateis configured to connect the pull-up resistor to a source voltage. 5.The light sensing system of claim 4, wherein the first gate isconfigured to connect the pull-up resistor based on whether the firstvoltage is greater than a threshold voltage level.
 6. The light sensingsystem of claim 1, wherein the second gate is configured to connect thepull-down resistor to ground.
 7. The light sensing system of claim 6,wherein the second gate is configured to connect the pull-down resistorbased on whether the first voltage is less than a threshold voltagelevel.
 8. The light sensing system of claim 1, wherein the light sensoris connected to a source voltage.
 9. The light sensing system of claim1, wherein the input pin is connected to a controller.
 10. The lightsensing system of claim 1, wherein the first gate is a CMOS circuit. 11.A method for detecting levels of light, comprising: receiving a firstvoltage from a light sensor; connecting a pull-down resistor to obtain afirst logic value; sampling a digital signal at an I/O pin; anddetermining a first light level based on the first logic value.
 12. Themethod of claim 11, further comprising: connecting a pull-up resistor ifthe first logic value is a logical output of 1; and afterwards,disconnecting the pull-up and pull-down resistors.
 13. The method ofclaim 11, further comprising: connecting a pull-up resistor to obtain asecond logic value if the first logic value is a logical output of 0.14. The method of claim 13, further comprising: sampling the digitalsignal at the I/O pin to determine whether the second logic value is alogical output of 1 or 0; and determining, based on the second logicvalue, that a second light level is lower than the first light level.15. The method of claim 14, further comprising: determining, based onthe second logic value, that a third light level is lower than thesecond light level.
 16. The method of claim 14, further comprising:connecting the pull-down resistor if the second logic value is a logicaloutput of 0; and afterwards, disconnecting the pull-up and pull-downresistors.
 17. The method of claim 14, further comprising: connectingthe pull-down resistor if the second logic value is a logical output of1; and afterwards, disconnecting the pull-up and pull-down resistors.18. An electronic device comprising: a light sensor configured to senselight and convert the sensed light to a first voltage; a microprocessorcoupled to the light sensor, the microprocessor including a digital I/Opin and configured to receive the first voltage from the light sensor; apull-up resistor coupled to the digital I/O pin; and a pull-downresistor coupled to the digital I/O pin; the microprocessor operative toselectively connect the pull-up resistor to the digital I/O pin at leastpartially in response to the first voltage; and the microprocessoroperative to selectively connect the pull-down resistor to the digitalI/O pin at least partially in response to the first voltage.
 19. Theelectronic device of claim 18, further comprising a controller coupledto the I/O pin.
 20. The electronic device of claim 19, furthercomprising a controlled component coupled to the controller.